d-Matrix has acquired Wallaroo.ai, a maker of software for deploying and orchestrating AI inference, in a deal the Santa Clara chip company announced on August 3, 2026. The purchase brings Wallaroo’s platform, intellectual property and engineering staff into d-Matrix, and it is the chipmaker’s second acquisition in four months.
The reasoning follows from how d-Matrix sells silicon. Its Corsair accelerators are built to run beside GPUs rather than replace them, taking the decode phase of a language-model request, the memory-bound half that emits tokens one at a time, while GPUs handle the compute-heavy prefill. Making that split work in a live cluster is a software job: something has to decide which chip gets which part of each request, hand the accumulated context between them, and scale both tiers independently as traffic shifts. That layer is what d-Matrix has just bought.
What Wallaroo brings
Wallaroo sells a serving runtime and a control plane that package models and push them onto x86, Arm and GPU hardware across cloud, on-premises, edge and fully air-gapped environments, with support for common LLM runtimes including vLLM and SGLang. Its engineering, product and go-to-market teams are joining d-Matrix, which cited their work in software architecture, high-performance computing and Kubernetes operations.
The two companies were already describing the same architecture. In a March 16, 2026 engineering post, Wallaroo founder and chief executive Vid Jain and two colleagues laid out the case for splitting prefill from decode across mixed silicon. Agentic traffic, they wrote, arrives in three sizes: roughly 84% short requests of about 2,000 tokens, around 15% in the 8,000-to-64,000-token range, and under 1% at 128,000 tokens or more. That final sliver monopolizes GPU time and blocks everything queued behind it. Cache-aware routing alone, the authors reported, cut worst-case time-to-first-token by 75% on agentic traffic in their own tests.
Sid Sheth, d-Matrix’s founder and CEO, said customers had told the company the biggest barrier “isn’t just performance, it’s also the operational complexity of getting there.” Jain said the two shared a view that inference is as much a deployment problem as a silicon one.
Two deals in four months
d-Matrix has been buying the parts of an inference system it did not build. In April 2026 it acquired GigaIO’s data center business, picking up the SuperNODE system and the FabreX PCIe-based memory fabric along with a rack-scale systems team in Carlsbad, California, while GigaIO continued independently in edge computing. Corsair itself entered full production on June 9, 2026, manufactured with Alchip on TSMC’s N6 node, using SRAM-based in-memory compute chiplets on organic substrates with LP-DDR5 memory instead of HBM stacks and CoWoS packaging, in racks that run air-cooled.
Paying for it is a $275 million Series C closed on November 12, 2025 at a $2 billion valuation, co-led by BullhoundCapital, Triatomic Capital and Temasek. The company has also been assembling partners around the platform, including a low-latency infrastructure partnership with Infineon.
Buying the deployment layer is becoming the standard move for anyone selling non-Nvidia (NVDA ) compute. Qualcomm closed its all-stock acquisition of compiler startup Modular (QCOM ) in July 2026, Nscale bought Anyscale to move up the compute stack the same month, and Nebius agreed to acquire Eigen AI in a $643 million deal aimed at inference infrastructure. Silicon that needs a second software stack to be useful loses to silicon that ships with one.
Where the pairing gets tested
The commercial proof point so far is Parasail, an inference cloud that on July 7, 2026 said it was deploying Corsair alongside its NVIDIA Hopper and Blackwell fleet, sending prefill to the GPUs and decode to the accelerators across a network drawing on more than 40 data centers in 15 countries. Parasail’s own kernel-routing technology does the dispatching there, which is precisely the function d-Matrix now owns in-house.
The performance case rests on measured and modeled results published by Gimlet Labs on March 11, 2026. Running gpt-oss-120b with a 1.6-billion-parameter draft model, the firm moved the speculative-decoding step off the GPU and onto Corsair while prefill and verification stayed on GPU, and reported 2x to 10x faster end-to-end requests at matched energy efficiency. Gimlet attributes the gain to the card’s 2GB of on-chip SRAM and roughly 150 TB/s of memory bandwidth, which lets the draft model produce candidate tokens fast enough that rejected guesses cost little. One of the post’s co-authors is d-Matrix chief technology officer Sudeep Bhoja.
Corsair is now shipping in volume to priority customers, and d-Matrix is hiring engineers across several specialties as the two organizations combine. The next buyer of a mixed GPU-and-accelerator rack will judge it on how quickly a model goes from evaluation to serving traffic, and that clock now runs on software d-Matrix owns.
